USPTO serial 97307198
ENLIGHT
Reviewed by CopyMark Law Group
- Filing date
- Status date
- Registration date
- Dec 3, 2024
- Examiner
- GOLDEN, JAMES B
- Law office
- FILE REPOSITORY (FRANCONIA)
What this means
Status 700 means the trademark is registered and active on the Principal Register. You have nationwide rights for the listed goods and services and may use ®. Section 8 maintenance is due between years five and six. Calendar Section 8 between years five and six, and consider trademark monitoring.
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Owner
Attorney of record
The USPTO lists this attorney as the applicant's representative for correspondence on this application.
Siho (Scott) Yoo
Siho (Scott) Yoo LEWIS ROCA ROTHGERBER CHRISTIE LLP203 REDWOOD SHORES PKWY, SUITE 670REDWOOD CITY, CA 94065UNITED STATESGoods and services
| Class | Description | Status | First use |
|---|---|---|---|
| 009 | Electronic components for computers; microelectronic components for computers; integrated circuits; printed electronic circuits for integrated circuit apparatus; memory circuits for system-on-chip devices; microprocessors; central processing units; CPU cores; System on a chip (SoC); computer memory hardware; dynamic random access memory (DRAM) controllers; electronic chips for the manufacture of integrated circuits and microcontrollers; graphics processing units, namely, three-dimensional graphic accelerator, high performance computing accelerator, artificial intelligence accelerator; GPU cores; topographies, namely, layout designs in the nature of downloadable and recorded templates of integrated circuits and microprocessors, integrated circuit modules; printed circuit boards; computers; downloadable software for operating integrated circuits, microprocessors, electronic chips and microcontrollers; downloadable software for customization of integrated circuits, microprocessors, electronic chips and microcontrollers; downloadable and recorded software for design, development and manufacture of integrated circuits, microprocessors, electronic chips and microcontrollers; electronic recorded and downloadable computer software and hardware for development, design and manufacture of integrated circuits, microprocessors, electronic chips and microcontrollers; recorded and downloadable compiler software; recorded and downloadable computer software development tools; recorded and downloadable computer software programming tools to aid in the programming of integrated circuits, microprocessors, microprocessor cores, instruction set architectures, semiconductor intellectual property, network-on-a-chip, or system-on-a-chip; recorded and downloadable software toolkits for quantization; recorded and downloadable software development kits for use in developing integrated circuits, microprocessors, microprocessor cores, instruction set architectures, semiconductor intellectual property, network-on-a-chip, or system-on-a-chip; integrated circuits incorporating instruction set architectures; interfaces between computer hardware and computer software; computer hardware accelerators; neural network processors being central processing units; neural processing units being central processing units; machine learning microprocessors; secure microprocessors; downloadable electronic data files featuring semiconductor intellectual property cores; recorded and downloadable computer software used in and for use in the design, development, modelling, simulation, compiling, de-bugging, verification, construction and interfacing of integrated circuits, microprocessors, graphics processing units, neural network processors, neural processing, machine learning processors, microprocessor cores, semiconductor intellectual property cores, macro cells, microcontrollers, bus interfaces and printed circuit boards; microprocessor design files; downloadable electronic data files featuring microprocessor designs, neural network processor designs, neural processing unit designs and machine learning processor designs; computer hardware for processing and accelerating artificial intelligence, deep learning, and machine learning technology; system on a chip (SOC) hardware for use with CPUs and GPUs featuring SOC architecture that connects die-to-die, chip-to-chip, and socket-to-socket, used across different microprocessors to enable increased computing performance; network-on-a-chip, namely, technology that provides interfaces across microprocessor CPU and GPU cores, memory, hubs and data fabric to enable microprocessor communications and increase computing performance and efficiency; graphics processor subsystem, namely, microprocessor subsystems comprised of microprocessors, graphics processing units (GPUs), GPU cores, and embedded software for operating the foregoing; electronic downloadable publications, namely, instruction, user and development manuals, technical manuals, educational materials, training materials, datasheets and brochures all in the area of computer software and hardware, development and evaluation tools for integrated circuits, microprocessors, microprocessor cores, instruction set architectures, semiconductor intellectual property, network-on-a-chip, system-on-a-chip; computer hardware featuring architecture to enable increased computing performance; interfaces for computers; recorded and downloadable computer software used for use in the design, development, modelling, simulation, compiling, de-bugging, verification, construction and interfacing of integrated circuits, microprocessors, microprocessor cores, semiconductor intellectual property cores, architecture extensions to semiconductor intellectual property cores, macro cells, microcontrollers, bus interfaces and printed circuit boards; recorded and downloadable computer software for use in the design, development, modelling, simulation, compiling, de-bugging, verification, construction and interfacing of application software and operating system software to run on integrated circuit based devices; Downloadable electronic data files featuring microprocessor designs; semiconductor intellectual property cores with multiple processors designed to transition software workloads to the appropriate processors based on performance needs; recorded and downloadable computer software used in and for use in the design, development, modelling, simulation, compiling, debugging, verification, construction and interfacing of heterogenous computing systems and semiconductor intellectual property cores with multiple processors designed to transition software workloads to the appropriate processors based on performance needs; Downloadable electronic data files featuring semiconductor intellectual property core design files defining the design of heterogenous computing systems and semiconductor intellectual property cores with multiple processors designed to transition software workloads to the appropriate processors based on performance needs | ACTIVE | Oct 16, 2018 |
| 016 | Printed materials, namely, instruction, user and development manuals, technical manuals, educational materials, training materials, datasheets and brochures all in the area of computer software and hardware, development and evaluation tools for integrated circuits, microprocessors, microprocessor cores, instruction set architectures, semiconductor intellectual property, network-on-a-chip, system-on-a-chip, none of the aforesaid being related to irrigation or watering | ACTIVE | Oct 16, 2018 |
Related trademarks
CopyMark links this record to cited §2(d) serials, the owner's other marks, Nice classes, similar mark names, and recently changed USPTO applications.
- Other trademarks owned by OPENEDGES Technology, Inc.
- Other trademarks owned by OPENEDGES Technology, Inc.
- Other trademarks owned by OPENEDGES Technology, Inc.
- Other trademarks in Class 009
- Other trademarks in Class 016
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- Recently changed USPTO trademarks
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Prosecution history
| Date | Code | Event | What it means |
|---|---|---|---|
| Dec 3, 2024 | NRCC | NOTICE OF REGISTRATION CONFIRMATION EMAILED | — |
| Dec 3, 2024 | R.PR | REGISTERED-PRINCIPAL REGISTER | Your trademark is registered on the Principal Register — the strongest form of federal trademark protection. You may use the ® symbol for the covered goods and services. Maintenance filings (Section 8 and renewals) are required to keep the registration alive. |
| Oct 1, 2024 | NPUB | OFFICIAL GAZETTE PUBLICATION CONFIRMATION E-MAILED | — |
| Oct 1, 2024 | PUBO | PUBLISHED FOR OPPOSITION | Your mark was published in the USPTO Official Gazette for a 30-day opposition window. During that period, third parties who believe they would be harmed can file an opposition. If no opposition is filed, prosecution usually continues toward registration or a Notice of Allowance. |
| Sep 11, 2024 | NONP | NOTIFICATION OF NOTICE OF PUBLICATION E-MAILED | — |
| Aug 29, 2024 | CNSA | APPROVED FOR PUB - PRINCIPAL REGISTER | — |
| Aug 29, 2024 | XAEC | EXAMINER'S AMENDMENT ENTERED | — |
| Aug 29, 2024 | GNEN | NOTIFICATION OF EXAMINERS AMENDMENT E-MAILED | — |
| Aug 29, 2024 | GNEA | EXAMINERS AMENDMENT E-MAILED | — |
| Aug 29, 2024 | CNEA | EXAMINERS AMENDMENT -WRITTEN | — |
| Sep 20, 2023 | TEME | TEAS/EMAIL CORRESPONDENCE ENTERED | — |
| Sep 19, 2023 | CRFA | CORRESPONDENCE RECEIVED IN LAW OFFICE | — |
| Sep 19, 2023 | TROA | TEAS RESPONSE TO OFFICE ACTION RECEIVED | This event means the applicant filed a response to a USPTO Office Action — typically arguments, amendments, or evidence addressing the examiner's objections. The USPTO will review the response and either allow the mark to proceed or issue another action. |
| Jun 21, 2023 | GNRN | NOTIFICATION OF NON-FINAL ACTION E-MAILED | A non-final Office Action means the USPTO examining attorney has raised at least one issue with your trademark application but has not made a final decision. You usually have three months to respond with arguments, amendments, or evidence. Missing the deadline can abandon the application. |
| Jun 21, 2023 | GNRT | NON-FINAL ACTION E-MAILED | A non-final Office Action means the USPTO examining attorney has raised at least one issue with your trademark application but has not made a final decision. You usually have three months to respond with arguments, amendments, or evidence. Missing the deadline can abandon the application. |
| Jun 21, 2023 | CNRT | NON-FINAL ACTION WRITTEN | A non-final Office Action means the USPTO examining attorney has raised at least one issue with your trademark application but has not made a final decision. You usually have three months to respond with arguments, amendments, or evidence. Missing the deadline can abandon the application. |
| Dec 20, 2022 | DOCK | ASSIGNED TO EXAMINER | — |
| Mar 16, 2022 | NWOS | NEW APPLICATION OFFICE SUPPLIED DATA ENTERED | — |
| Mar 15, 2022 | NWAP | NEW APPLICATION ENTERED | — |